2010/10/30: GNU make and default rules

The GNU make utility has quite a lot of "implicit" rules and implicitly set variables. The first can hit you, if you organise your stuff even only slightly differently than the "standard GNU way". The latter is even worse, as it renders constructions like

CC ?= clang

pointless, as CC is already set to cc even before GNU make starts reading your Makefile. (Of course, you can override explicitly in calls like gmake CC=clang, but you usually want to inherit from environment variables; and think of generic slave Makefiles, included at the end of a specific Makefile.)

Fortunately, there are the commandline options -r ("no builtin rules") and -R ("no builtin variables"). To make good use of these options without forcing the user to remember that gmake needs them to handle your Makefile properly, you can use a construction like the following.

ifeq (${RECURSIVECALL},)
MAKEFLAGS += -rR 
%:
    @${MAKE} RECURSIVECALL=1 $@
all:
    @${MAKE} RECURSIVECALL=1 all
else

####################################
## Your actual Makefile goes here ##
####################################

endif

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